Today, the company has announced the acquisition of Metrics Design Automation, a Canadian company led by Joe Costello , former CEO of Cadence Design Systems (1988-1997). The company described DSim as a full feature System Verilog and VHDL RTL simulator. It enables designers to simulate the engineering behaviour of complex assemblies. One of the recurring themes of DAC was the increasing complexity of chips and systems due to the increased data and computing demands imposed by AI and the need for low-latency operation as well as the complexity of chiplet design to meet more performance, efficiently and in small form factors.
The digital simulator (DSim) operates as a software as a service business model for functional simulation and design verification. It is intended to be combined with Altair’s Silicon Debug Tools portfolio, which includes StarVision Pro, RTLvision Pro, SpiceVision Pro and GateVision Pro for simulation and debug. According to the Altair, the cloud-based business model “has the potential to transform the semiconductor space by making high calibre EDA design tools much more affordable and accessible for companies looking to aggressively scale out simulations to accelerate design cycles”.
The combined tools can run as a desktop app, on a company’s servers, or in the cloud and can run very large regressions with the customer paying only for what they use, explained Altair. It supports System Verilog and VHDL RTL for digital circuits targeting asics and FPGAs. Simulations can be run concurrently and at scale, dramatically reducing the traditional design cycle time and cost.