JEDEC plans advanced memory modules for next-gen AI applications

Specifically, the standards body has revealed details about its standards for DDR5 Multiplexed Rank Dual Inline Memory Modules (MRDIMM) and a next-generation Compression-Attached Memory Module (CAMM) for LPDDR6. The aim is to provide “unparalleled bandwidth and memory capacity”.

Both projects are in development in JEDEC’s JC-45 Committee for DRAM Modules.

The organisation writes:

“The JEDEC MRDIMM standard is set to deliver up to twice the peak bandwidth of native DRAM, enabling applications to surpass current data rates and achieve new levels of performance. It maintains the same capacity, reliability, availability, serviceability (RAS) features as JEDEC RDIMM.”

“The committee aims to double the bandwidth to 12.8 Gbps and increase the pin speed. MRDIMM is envisioned to support more than two ranks and is being designed to utilize standard DDR5 DIMM components ensuring compatibility with conventional RDIMM systems.”

DDR5 MRDIMMs

For DDR5 MRDIMMs, Jedec highlights that multiplexing allows multiple data signals to be combined and transmitted over a single channel. This has the effect of increasing the bandwidth without the need for additional physical connections. It also provides a seamless bandwidth upgrade to enable applications to exceed DDR5 RDIMM data rates, it says.

Another feature of the MRDIMMs is platform compatibility with RDIMMs. Furthermore, the use of standard DDR5 DIMM components (including DRAM, DIMM Form Factor & Pinout, SPD, PMIC, and TS) for ease of adoption, and efficient I/O scaling using RCD/DB logic process capability.

LPDDR6

As a follow-on to JEDEC’s JESD318 CAMM2 Memory Module standard, the JC-45 committee is also developing a next-generation CAMM module for LPDDR6. This targets a maximum speed greater than 14.4 GT/s.

The advanced memory modules will also offer a 24-bit subchannel, a 48-bit channel and a connector array.

See also: JEDEC publishes new CAMM2 memory module standard