Functional safety dev tools for E6-A and S7-A automotive RISC-V cores

IAR Systems is aiming at SiFive’s E6-A and S7-A automotive RISC-V cores with its latest iteration of Embedded Workbench.

IAR SiFive car graphic

“E6-A series is aimed at a variety of real-time 32bit applications, from system control to hardware security modules, safety islands and stand-alone in microcontrollers,” according to IAR. “S7-A is a 64bit, high-performance real-time core suited to the needs of modern SoCs with performant safety islands, requiring both low latency interrupt support and the same 64bit memory space visibility as the main application CPUs. SiFive automotive processor families offer options that enable area and performance optimiation for different integrity levels like ASIL B, ASIL D or mixed criticalities with split-lock, in line with ISO26262.”

‘Embedded Workbench for RISC-V’ includes a C/C++ compiler and a debugger. The functional safety edition is certified by TÜV SÜD according to the requirements of functional safety standards including ISO 26262 and IEC 61508. It also includes C-STAT, a static code analysis tool to assess alignment with MISRA C:2012, MISRA C++:2008 and MISRA C:2004 standards.


Customers using Embedded Workbench for RISC-V get guaranteed support for the sold version for the duration of the support contract, service packs and regular reports of known deviations and problems.


IAR Systems is headquartered in Uppsala, Sweden, and has more than 220 employees in 14 offices distributed across APAC, EMEA, and North America.


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