The IGLOO2 FPGA evaluation kit includes a PCIe control plane demonstration design for the development of transceiver I/O-based FPGA designs to build PCIe and Gigabit Ethernet-based systems.
The kit uses a standard laptop with an ExpressCard slot or a desktop with a PCIe slot.
The kit includes a 12k logic element M2GL010T-1FGG484 device and includes an RJ45 interface to 10/100/1000 Ethernet, Full-Duplex SERDES SMAs, 512MB of LPDDR, 64MB SPI Flash, USB-UART connections as well as I2C, SPI and GPIO headers.
The kit includes a 12V power supply but can also be powered via the PCIe edge connector and a FlashPro4 JTAG programmer for programming and debugging.
The kit allows for development and testing of PCIe Gen2 x1 lane designs, as well as testing of the FPGA transceiver’s signal quality using full-duplex SERDES SMA pairs, said Microsemi.