Altera adds high speed comms cores for 28nm FPGAs

In the last 12months it has released more than 15 new protocol interface IP cores.

Altera claims the IP cores in expanded IP portfolio have been upgraded to deliver 15% timing margin for faster timing closure.

The portfolio of IP cores contains popular external memory protocols, protocol interface IP, and video and image processing IP.

New protocol interface cores for 28nm include:

• 50G/100G/150G/200G Interlaken, targeting wireline applications

• Serial RapidIO Gen 2 up to 6.25Gbit/s per lane, targeting wireless applications

• 10/100/1000 Mbit/s 1588 Ethernet MAC cores, enabling precise time synchronization on Ethernet networks

• SerialLite III Streaming, enabling high bandwidth, low latency point-to-point serial data transfers across various transmission media

A complete list of Altera’s newest IP cores.