Architecture

The first products in the adaptive compute acceleration platforms (ACAPs) are unveiled

The 55th Design Automation Conference (DAC) will cover many topics for chip and system designers

Power consumption is hard to predict even with a reasonable amount of architectural information and that is underlined in a paper that appeared at the Architectural Support for Programming Languages and Operating Systems (ASPLOS) conference last April. but recently picked up by LinuxDevices. In the paper, the researchers argue that processor maker need to make power information for their products ...

The Low-Power Engineering Community has published the last instalment of its round table discussion on bringing architectural decisions into low-power design with some thoughts on what is needed in tools and whether power is the factor that finally forces the majority of chip-design teams to use high-level synthesis extensively. Around the table were: Mike Meyer, a Cadence fellow; Grant Martin, ...

ARM has joined nVidia in espousing the virtue of low-power ‘shadow’ processors that can take over from a high-energy processor when workloads are relatively light. Unlike nVidia, which tuned the threshold voltages for the existing Cortex-A9 in two different directions for the ‘Kal-El’ Tegra 3 multicore system-on-chip (SoC), ARM considered it could provide greater energy savings by developing a new ...

Graphics chipmaker nVidia has fully embraced the philosophy of adding more, slower processors to a die to bring overall power consumption down. The company is moving from one or two processor cores for its Tegra family of devices for smartphones to five. The number of processors seems odd in both senses of the word when considering a symmetric multiprocessor architecture. ...

ARM has decided to extend its relationship with the University of Michigan low-power electronics research team that ARM R&D vice president Krisztián Flautner worked with before joining the IP company. According to Peter Clarke at EETimes: “The five-year, $5 million extension of an existing research partnership will run until 2015 and cover technology for ultra-low energy computing and applications areas ...

During the 17th IEEE/ACM International Symposium on Low-Power Electronics and Design, a paper by Phillip Stanley-Marbell and colleagues from IBM Research in Zurich showed that current trends in the number of power supply pins and the total pins available in packages will limit how much parallelism programmers will be able to squeeze out of the on-chip processors. It may only ...

A research team from Carnegie-Mellon University and Intel Labs has concluded that future compute servers for large data centres should look more like racks of simple embedded systems or as they put it “wimpy nodes”. The team originally presented the idea at the 22nd ACM Symposium of Operating Systems Principles but an updated version of the paper has now appeared ...

One topic kept cropping up at the Design Automation Conference (DAC) in San Diego earlier this month: the 3D integrated circuit (3DIC). It’s not a new idea, as Mary Olsson, chief analyst for Gary Smith EDA wryly pointed out before the conference kicked off: “It’s very much like the overhyped multichip-module market.” Twenty years ago, a number of companies thought ...