The company, with the University of Cambridge and materials suppliers Avecia and Gwent Electronic Materials, was last week awarded £1.2m as part of the Government’s £90m Micro and Nanotechnology Manufacturing initiative, announced last year.
High resolution printing techniques are necessary to enable improved device integration density and low parasitic capacitance.
The current state of the art is a line width of around 50µm, pictured above with lines of silver nanoparticles used to form the gates and interconnects in Plastic Logic’s transistors.
www.plasticlogic.com