EDA and IP

Synopsys has announced intellectual property (IP) prototyping kits, virtual development kits and customised subsystems to accelerate prototyping, software development and the integration of IP into SoCs. Under the brand ‘IP Accelerated’, the firm’s aim is to give designers a flying start by providing them with working products they can modify. The prototyping kits consist of a pre-verified reference design IP ...

Digi-Key is to offer what it calls “professional-class” PCB design tools in collaboration with EDA company Mentor Graphics. The three new tools are Designer Layout, a schematic capture tool called Designer Schematic and a component-sourcing tool called PartQuest. The intention is to provide PCB design tools with component-finding software linked to the distributor’s website and access to PCB design and ...

Stock management is crucial in any industry, but when the end-product falls into a high-reliability sector, such as military, medical or aerospace, then the stakes are even higher. Qualifying components for use in a hi-rel application is a critical step and managing the supply and deployment of those components once qualified is equally critical, write Mattias Ericson from Omnisys Instruments and Robert Huxel from Altium ...

Complex chip design simulation and emulation is moving out of the engineering lab to become a global resource which can support multiple projects. Emulator supplier, Mentor Graphics believes this will dramatically change chip design by making emulation more accessible and cost-effective. “Increasing hardware and software complexity in system on chip design requires increased emulation engine power, and emulation had to ...

Cadence Design Systems has ported Sonic Emotion’s Absolute 3D sound software to the Tensilica HiFi audio/voice licensable IP DSP core. This is a first for Absolute 3D sound which is targeted at high end mobile and TVs, said the EDA company. The 3D audio IP is designed to create a virtual 3D sound field across a listening area. It was used in Samsung Soundbars exhibited ...

Synopsys introduces intellectual property for LPDDR4

Cadence Design Systems has agreed to acquire Jasper Design Automation, a supplier of formal analysis tools, for around $170m in cash. Cadence has recognised the growing use of formal analysis to complement traditional verification methods. “With verification representing over 70% of the cost of developing a system-on-chip, it has become the top system and SoC development challenge and is the critical factor for time-to-market,” said ...

Imagination Technologies has adopted the Mentor Graphics Veloce 2 enterprise emulation platform which it will use for  verification of its processor cores. “The Veloce co-modeling technology enabled us to reduce our regression times,” said Mark Dunn, executive v-p SoC Design, Imagination Technologies. “Imagination has shown us how better emulation technology helps their business through benefits such as better coverage of corner cases, ...

Sysgo, the safety-critical sofware supplier, has integrated its certified RTOS/hypervisor PikeOS with Lauterbach’s Trace32 debugger tool that supports the debugging of ELinOS, its embedded Linux product, running as PikeOS’ personality. PikeOS developers were already able to use Trace32 from Lauterbach, a debugging capability incorporating bootstrap code, interrupt routines and drivers.  The new version of Lauterbach’s Kernel awareness extends this capability to debugging any thread ...

ARM is to replace its compiler with a completely new one built on the LLVM open-source framework. “We are not stopping ARM Compiler 5 for at least five years,” added ARM. The result, which will not be open-source, is to be called ARM Compiler 6, and will be released first for 64bit ARM v8 architecture cores in an ‘initial’ form ...