Cadence adds apps for billion gate SoCs to emulation hardware

“These domain-specific apps allow customers to manage increasing system design complexity, improving system-level accuracy and accelerating low-power verification for applications such as artificial intelligence, machine learning, hyperscale and mobile,” according to the company.

They are:

• Four-state emulation for simulations requiring X-propagation, such as for low-power verification of complex SoCs with multiple switched power domains
• Real number model emulation to acceleration simulation of mixed-signal designs
• Dynamic power analysis to speed “million-clock-cycle”, said Cadence, power analysis of massively parallel multi-billion-gate SoCs

“To keep up with today’s SoC design requirements, customers need an emulation solution that offers performance with predictable compile and debug,” said company verification v-p Dhiraj Goswami. “With the release of these new apps, our customers can now accelerate X-propagation and mixed-signal on emulation.”