Segger has added an oscilloscope-like window to its SystemView embedded system analysis software to record variable data alongside runtime events. Called DataPlot, its graphs are synchronised with SystemView’s Timeline and CPU Load windows. Data can be sent in fixed point or floating-point formats and multiple variables can be recorded – each identifiable by a descriptive name and a different color ...
Würth Elektronik adds dc ripple bias modelling to its RedExpert on-line power analysis tool. “It is a well-established but little understood fact that ac core losses increase when the ac ripple is dc biased – normal intuition says that dc bias does not increase ac cores losses because it is a static shift,” it said. It is a situation found ...
Microchip has released a C++ algorithm high-level synthesis design workflow for its PolarFire FPGAs. “A large majority of edge compute, computer vision and industrial control algorithms are developed natively in C++ by developers with little or no knowledge of underlying FPGA hardware,” according to the company. Called SmartHLS, the tool allows C++ algorithms to be directly translated to FPGA-optimised RTL ...
UnitedSiC has launched a simple on-line design tool to calculate power losses and other parameters for power supplies using the company’s silicon carbide transistors and diodes. Called FET-Jet Calculator, no registration is needed, although you do have to click a minimal user agreement. This is not the sort of tool that tells you which transistors to use for a certain ...
Mains power chip firm Power Integrations has released a cloud-based app version of its PI Expert Suite power supply design tool. Previously, users downloaded the tool to a local PC or workstation. “With the cloud-based version, designers may access the design tool from any internet browser and can be sure that they are always using the most up-to-date version,” said ...
Silicon Labs’ new Clock Tree Expert tool enables embedded developers to generate sophisticated, streamlined clock tree block diagrams within minutes, simplifying system design, reducing bill of materials (BOM) count and speeding time to market.
“Abstractions drive automation,” Tom Feist of Xilinx told the Globalpress Summit in Santa Cruz this week. “A thousand evaluations of the technology are going on right now,” said Fiest referring to the company’s Vivado FPGA design tool which allows FPGA users to programme FPGAs in C. The Vivado Design Suite 2013.1 has an IP-centric design environment for accelerating system integration, ...
Martin Harris, v-p, sales and support in Europe for chip design tool firm Altium talks to Electronics Weekly about how the use of unified data model can bring the benefits of a more holistic approach to semiconductor design.
National Semiconductor has added a three dimensional graphing tool to its web-based Webench power supply design tool. Called Visualizer, it takes the multiple solutions proposed by Webench and displays them in graphical form.
Configurable processor core designer ARC has developed a family of low power cores and an operating system with special instructions to control them. The EnergyPro cores have been developed with Cadence Design Systems and Virage Logic, integrating power management block, dynamic voltage and frequency scheduling and clock gating on two ARC600 cores with specialist instructions to reduce power. This is a key ...
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