80 Arm Neoverse V1 cores and in-package memory for SiPearl MCU

SiPearl has revealed some details of its AI microprocessor.

Rhea1, as it will be called, “will fulfill the mission entrusted by EuroHPC JU and the European Processor Initiative
consortium: to bring dedicated high-performance microprocessor technologies back to Europe”, according to the company.

The plan is for it to have 80 Arm Neoverse V1 cores, each with two 256bit SVEs (scalable vector extensions) and built-in high bandwidth memory “to provide a balanced solution ideal for HPC, big data and AI Inference applications, which are often memory bandwidth bound”, according to SiPearl.

Four DDR5 interfaces will support two DIMMs/channel and there will be 104 lanes of PCIe Gen5 – 6x 16 lanes plus 2x 4 lanes.

Computation and peripheral resources will be connected by a Neoverse CMN-700 coherent mesh network-on-chip.

“Rhea1 is supported by a range of compilers, library and tools, from programming languages such as C/C++, GO and RUST, to AI frameworks such as TensorFlow or PyTorch,” said the organisation, which claimed that it is “suited to traditional high-performance computign workloads – its initial target market – and also to AI inference workloads”.

Samples are scheduled for 2025.

The company employs more than 190 people in: France (Maisons-Laffitte, Grenoble, Massy, Sophia Antipolis), Germany (Duisburg), Italy (Bologna) and Spain (Barcelona).