Will yields mitigate 300mm gains?

It’s not that simple according to some here at the Semiconductor Equipment and Materials International’s Strategic Business Conference.

There are some early adopters of 300mm that have proven that it is indeed cost effective. But much of the industry will be taking its first stab at 300mm production with the 90nm node. In fact, during a panel discussion this week, panelists suggested that the problems inherent in bringing 90nm and eventually 65nm technology to production will negate some, if not much of the capacity to be gained by the latest wafer size transition.

DRAM, followed by flash, were the first markets to really to see the impact of the 300mm transition, followed by microprocessor makers, namely Intel, noted Steve Newberry, president and COO of process tool vendor Lam Research. “But a lot of productivity has been mitigated by the fact there are more wafer passes,” he said. Process windows are much tighter, and with the transition from 0.13µm processes to 90nm processes, yields have taken centre stage as an issue in the conversion to larger wafers.

But it’s not the size of the wafer in itself that is at issue; it’s the number of wafer passes through process tools and the complexity of designs and materials integration that is necessary at 90nm. As a result, the transition to 300mm wafers won’t necessarily resulted in the productivity gains – and thereby capacity – that the industry once envisioned, Newberry suggested.

Much of the 300mm capacity being put in place right now is for production at the 90nm node, agreed Phil Ware, a senior fellow with lithography tool vendor Canon. In terms of cutting edge lithography, in using 193nm exposure tools, the industry is tasked with resolving features less than half the measure of the wavelength of light used to pattern them on a wafer.

This involves increasing the complexity of the lithography cell process: resolution enhancement techniques such as phase shifting and higher numerical apertures that involve advanced lens technology, for example. At the 65nm node this is likely compounded further with the introduction of immersion lithography.

“You’re really focusing on a lot of issues that aren’t readily solved,” Ware said. “I don’t think it’s going to be an easy transition.”

These problems are felt all along the supply chain, not just at chipmakers. With process technology getting ever more complex, process recipes are more and more tailored to individual chipmakers. For a process tool component and critical subsystems supplier like Advanced Energy Industries it means breaking from the past and replicating component and subsystems design across numerous customers.

This could lead to further consolidation in this market, suggested Doug Schatz, chairman, president and CEO of Advanced Energy. Having to serve an industry full of customers that demand individual applications leaves room only for a handful of suppliers who have global channels of sales and support, he suggested.

So What About the Yield?

Aside from the capacity question, these issues beg the further question, how will the industry achieve the yields it needs at the 90nm and 65nm node?

Newberry suggested that advanced process technology needs to go a step further beyond in-situ monitoring in the process chamber to the point that process tools become self-governing. Data provided by sensors in the process chamber will have to be fed back to the tool’s components so they can adjust themselves in real time without the intervention of an operator or technician before they drift out of spec, thereby increasing tool availability and ultimately productivity.

In the realm of lithography, suppliers are looking at developing tunable lithography lenses and resists, panelists suggested.
But even beyond these things, the entire supply chain is going to have to take a more integrated and cooperative approach to process technology at these advanced nodes, otherwise ramping the 90nm and 65nm nodes may prove exorbitantly expensive, Newberry suggested. Indeed, it is already proving a costly ramp.

While throughput advances have actually lowered the cost of ownership of exposure tools over time, there is still mighty big sticker shock coming on new tools. Canon’s Ware noted that leading edge 193nm exposure tools with numerical apertures above 0.85 are already in the $20m range. “It’s going to be unprecedented and there is going to be no choice but to pay it, because that’s what they cost,” he said.

All the more reason for the industry to make cooperative efforts in the form of licensing IP and in non-competitive R&D through consortia, Newberry said. He noted that it has taken five years to implement true low-k dielectric films, and even at the 90nm node it’s not clear that the industry has been successful, he added. Many here suggest the bulk of interconnect dielectric films used in production will once again be fluorinated silicon glass at the 90nm node.

With the other exotic materials on the horizon that may prove necessary for the 90nm and 65nm nodes, such as high-k gate dielectrics, if they take five years to implement and successfully integrate, it will send costs even higher, Newberry suggested.

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