Electronics Weekly Electronics Design & Components Tech News
Working in collaboration with the Open Compute Project Foundation (OCP), the electronics standards body says it has combined the capabilities and open standards of OCP’s Chiplet Data Extensible Markup Language (CDXML) into its JEP30 Guidelines.
In prospect, it suggests, is the possibility of automating System in Package (SiP) design and assembly using chiplets that have their thermal properties, physical and mechanical requirements specified.
JEDEC writes:
“This integration expands the capability of the PartModel to enable chiplet builders to also provide standardized chiplet part descriptions to their customers electronically. This advancement opens the door to automating SiP design and assembly using chiplets. The chiplet descriptions encompass crucial information for SiP builders, including thermal properties, physical and mechanical requirements, behavior specifications, power and signal integrity properties, testing in-package and security parameters.”
JEP30
JEP30 establishes the requirements for exchanging part data between part manufacturers and customers for electronic products. Applying to all forms of electronic parts, it covers sub-sections such as electrical, physical, thermal, and assembly process classification data along with materials and substances that may be present.
The standards body cites, as one example, the standard being used to define a part in sufficient detail to enable process efficiencies during product life cycles, i.e., design, purchasing, manufacturing, quality control and test.
The latest work with OCP includes an addition of a standard representation for Die-Arrays, which is scalable to support multiple depths of hierarchical nested arrays.
“The evolution of JEP30 represents a paradigm shift in facilitating electronic product development and manufacturing,” said Mian Quddus, JEDEC Board of Directors Chairman. “Enabling component manufacturers to create standardized digital part models streamlines design processes while reducing human error, marking a transformative leap forward.”
Chiplet marketplace
For its part, the Open Compute Project Foundation highlighted the importance of JEP30 for a chiplet marketplace:
“The OCP is very pleased to continue its collaboration with JEDEC, advancing the standards needed to build a new silicon supply chain in support of commercially viable and standalone Chiplet marketplace, as part of our vision for an Open Chiplet Economy,” said Cliff Grossner, Chief Innovation Officer at OCP.
“The addition of a standard representation for Die-Arrays in just one of the follow-on joint work efforts between the OCP and JEDEC communities and we look forward to a long line of follow-on additions to support advanced SiP packaging.”
More information about JEP30D is available for download from the JEDEC website.
